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Kurzfassung

The demand on efficient interconnection technologies keeps growing pushed by the amount of information that data centers and high-performance computers need to process day by day. Interconnects in integrated circuits (IC) are today made of metals such as Cu, W or Au.  These electrical connections are intrinsically limited in their performance by dissipative wave propagation and line charging, crosstalk, and a relatively high latency. Conversely, using light as information carrier strongly reduces power dissipation in long interconnections and provides ultra-high bandwidth. The integrated optical waveguide is a monolithically integrated communication channel which goes through a silicon chip and connects one surface with the other. In this way, coupling of external light sources to photonic integrated circuits can be eased and stacked 3D photonic chip architectures can be adopted for inter-chip and intra-chip data exchange.


Hintergrund

Long-haul communication through optical fibers is at the backbone of the internet and thousands of cables running undersea allow the global network to be efficiently fast. On the other hand, short distance communication has been for many years dominated by electrical interconnections. Especially on chips, electrical interconnects can today deal with transfer rates of several Gbps. However, to keep the pace with increasingly faster CPUs, this technology might soon need to be replaced by a more efficient one. Here optical links come to play a fundamental role. In fact, silicon photonics can provide all the needed potential to sustain this exceptional growth. Transfer rates of several Tbps can be handled in this way on a platform whose production takes advantage of the well-established CMOS manufacturing methods. Data centers and high-performance computers are the main players in a future of ultrafast short-scale data transmission and silicon photonics provides an extraordinary opportunity to stay on top of this challenging scenario.


Problemstellung

Photonic integrated circuits consist of many fundamental blocks which can either be active or passive. Active components such as modulation devices, light sources and photodetectors depend on passive components such as waveguides and fiber couplers for the delivery of information-rich pulses of light. These optical interconnections are usually realized as a planar network that extends on the surface of the chip. In particular, the coupling of external light sources as optical fibers or vertical-cavity surface-emitting lasers (VCSELs) into the optical network can require large portions of the chip surface occupied by grating coupling devices. Furthermore, these elements require a long tapered waveguide section joining their edge with the much smaller integrated silicon waveguides. This size mismatch is of the order of 10 µm and the space occupied on the surface by these coupling structures is of several hundred microns, which is also about the size of the whole chip. In addition, highly integrated solutions are emerging which envision optical chips stacked one on the top of each other. This 3D integration concept is based on the existence of a mediating actor which can bring the signals from one side of the chip to the other without leaving the optical domain and avoiding further electro-optical conversions. 


Lösung

A silicon waveguide etched through the full thickness of a silicon chip has the potential to greatly reduce the superficial space occupied by coupling structures and simultaneously pave the way for 3D advanced photonic chip packaging solutions. The integrated optical waveguide is realized by deep reactive ion etching, which is a well-established process in the CMOS industry. Therefore, this component can be directly implemented in the large-scale production of 200- or 300-mm large wafers. This manufacturing method additionally allows to obtain sloped sidewalls, which can provide the necessary transition from micrometric optical fibers to nanometric silicon waveguides over a length of hundreds of micrometers. In this way, an adiabatically tapered link to the optical network can be generated without sacrificing space on the chip’s surface. In fact, the size of the two end faces of the integrated waveguide should be matched with the size of the light source and of the coupling element whose dimension can be vastly reduced in comparison to direct coupling. Moreover, similarly to the through-silicon vias (TSVs) technology, connections in the vertical direction are enabled. This unlocks the opportunity of stacking electro-optical chips on the top of each other to reach unbelievably highly efficient optical networks in a tight and compact package. The integrated optical waveguide is surrounded by an annular hole which is partially interrupted by a bridging structure necessary to assure the required mechanical stability. The waveguide cladding can be realized using different materials such as SiO2, Si3N4 or simply air.


Vorteile

  • Implementation in the bulk of the chip
  • suitable for opto-electronic and all-optical networks on chip
  • customizable geometry
  • ultra-high bandwidth
  • monolithically integrated

Anwendungsbereiche

  • Optical links
  • Optical clock distribution
  • Optical coupling
  • Sensing
  • 3D packaging

Service

  • licensing
  • R&D collaboration
  • patent sale

Technische Hochschule Wildau

Yijian Tang
+49 (0) 3375 508 852
patente@th-wildau.de
www.th-wildau.de/patente
Adresse
Hochschulring 1
15745 Wildau



Entwicklungsstand

Machbarkeit


Patentsituation

  • EP 21170747.6 anhängig

Stichworte

Optical interconnects, optical vias, photonic waveguides, silicon waveguides, 3D packaging, optical interposer

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